LM2904W, LM2904AW Low power dual operational amplifier Datasheet production data Features Frequency compensation implemented internally N Large DC voltage gain: 100 dB DIP8 Wide bandwidth (unity gain): 1.1 MHz (Plastic package) (temperature compensated) Very low supply current/op (500 A per channel) Low input bias current: 20 nA (temperature D compensated) SO-8 Low input offset current: 2 nA (Plastic micropackage) Input common-mode voltage range includes negative rail Differential input voltage range equal to the power supply voltage P TSSOP8 Large output voltage swing 0 V to + (Thin shrink small outline package) (V - 1.5 V) CC ESD internal protection: 2 kV Pin connections (top view) Automotive qualification + V Output A CC Description Inverting input A Output B The LM2904W and LM2904AW circuits consist of Non-inverting input A Inverting input B two independent, high gain operational amplifiers - V Non-inverting input B CC which employ internal frequency compensation and are designed specifically for automotive and industrial control systems. They operate from a supply. In linear mode, the input common mode single power supply over a wide range of voltage range includes ground. The output voltages. The low power supply drain is voltage can also swing to ground even though independent of the magnitude of the power operated from a single power supply. supply voltage. Application areas include transducer amplifiers, DC gain blocks, and all the conventional op-amp circuits which now can be more easily implemented in single power supply systems. For example, these circuits can be directly supplied from standard +5 V which is used in logic systems and easily provides the required interface electronics without requiring any additional power February 2013 Doc ID 9893 Rev 11 1/21 This is information on a product in full production. www.st.com 21Contents LM2904W, LM2904AW Contents 1 Schematic diagram 3 2 Absolute maximum ratings and operating conditions . 4 3 Electrical characteristics . 6 Typical single-supply applications . 11 4 Macromodel . 13 4.1 Important note concerning this macromodel 13 4.2 Macromodel code . 13 5 Package information 15 5.1 DIP8 package information 16 5.2 SO-8 package information 17 5.3 TSSOP8 package information . 18 6 Ordering information . 19 7 Revision history . 20 2/21 Doc ID 9893 Rev 11