Anvyl Reference Manual Revision: May 23, 2013 1300 NE Henley Court, Suite 3 Note: This document applies to REV B of the board Pullman, WA 99163 (509) 334 6306 Voice (509) 334 6300 Fax Overview The Anvyl FPGA development platform is a complete, ready-to-use digital circuit development platform based on a speed grade -3 Xilinx Spartan-6 LX45 FPGA. The large FPGA, along with the 100-mbps Ethernet, HDMI Video, 128MB DDR2 memory, 4.3 LED backlit LCD touchscreen, 128x32 pixel OLED display, 630 tie-point breadboard, multiple USB 2 HID controllers, and I S audio codec, makes the Anvyl an ideal platform for an FPGA learning station capable of supporting embedded processor designs based on Xilinxs MicroBlaze. The Anvyl is compatible with all Xilinx CAD tools, including ChipScope, EDK, and the free ISE WebPack, so designs can be completed at no extra cost. The board dimensions are 27.5cm x 21cm. The Spartan-6 LX45 is optimized for high performance logic and offers: 6,822 slices, each containing four input LUTs and eight flip-flops 2.1Mbits of fast block RAM four clock tiles (eight DCMs & four PLLs) 58 DSP slices 500MHz+ clock speeds A comprehensive collection of board support IP and reference designs, and a large collection of add-on boards are available on the Digilent website. See the Anvyl page at www.digilentinc.com for more information. Doc: 502-258 page 1 of 16 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Anvyl Reference Manual Features include: Spartan6-LX45 FPGA XC6SLX45-CSG484-3 128MB DDR2 SDRAM 2MB SRAM 16MB QSPI FLASH for configuration and data storage 10/100 Ethernet PHY HDMI Video Output 12-bit VGA port 4.3 wide-format vivid color LED backlit LCD screen 128x32 pixel 0.9 WiseChip/Univision UG-23832HSWEG04 OLED graphic display panel three two-digit Seven Segment LED displays 2 I S Audio codec with line-in, line-out, mic, and headphone 100MHz Crystal Oscillator on-board USB2 ports for programming and USB-HID devices (for mouse/keyboard) Digilent USB-JTAG circuitry with USB-UART functionality keypad with 16 labeled keys (0-F) GPIO: 14 LEDs (10 red, 2 yellow, 2 green), 8 slide switches, 8 DIP switches in 2 groups and 4 push buttons breadboard with 10 Digital I/Os 32 I/Os routed to 40-pin expansion connector (I/Os are shared with Pmod connectors) seven 12-pin Pmod connectors with 56 I/Os total ships with a 20W power supply and USB cable FPGA Configuration After being turned on, the FPGA on the Anvyl board must be configured (or programmed) before it can perform any functions. The FPGA can be configured in three ways: a PC can use the Digilent USB-JTAG circuitry (port J12, labeled PROG) to program the FPGA any time power is on, a configuration file stored in the onboard SPI Flash ROM can be automatically transferred to the FPGA at power-on, or a programming file can be transferred from a USB memory stick to the USB HID port labeled Host (J14). An on-board mode jumper (JP2) selects between JTAG/USB and ROM programming modes. If JP2 is not loaded, the FPGA will automatically configure itself from the ROM. If JP2 is loaded, the FPGA will remain idle after power-on until configured from the JTAG or Serial programming port (USB memory stick). Both Digilent and Xilinx freely distribute software that can be used to program the FPGA and the SPI ROM. Programming files are stored within the FPGA in SRAM-based memory cells. This data defines the FPGAs logic functions and circuit connections, and it remains valid until it is erased by removing power, asserting the PROG B input, or until it is overwritten by a new configuration file. FPGA configuration files transferred via the JTAG port and from a USB stick use the .bit file type, and SPI programming files use the .mcs file type. Xilinxs ISE WebPack and EDK software can create .bit www.digilentinc.com page 2 of 16 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.