PI6LC48H02LIE Diodes Incorporated

A product Line of Diodes Incorporated PI6LC48H02 PCIe 4.0/3.0/2.0/1.0 Clock Generator with 2 HCSL Outputs Features Description PCIe 4.0/3.0/2.0/1.0 compliant e PTh I6LC48H02 is a clock generator compliant to PCI Express 4.0/3.0/2.0/1.0 and Ethernet requirements. The device is used for LVDS compatible outputs PC or embedded systems. Supply voltage of 3.3V 10% 25MHz crystal or clock input frequency e Th PI6LC48H02 provides two differential (HCSL) or LVDS HCSL outputs, 0.8V Current mode differential pair outputs. Using Diodes patented Phase Locked Loop (PLL) tech- Jitter 35ps cycle-to-cycle (typ) niques, the device takes a 25MHz crystal input and produces two pairs of differential outputs (HCSL) at 25MHz, 100MHz, RMS phase jitter 12kHz ~ 20MHz 100MHz - 0.32ps (typ) 125MHz, 200MHz clock frequencies. RMS phase jitter 12kHz ~ 20MHz 125MHz - 0.3ps (typ) Industrial temperature range Packaging: (Pb-free and Green) 16-pin TSSOP (L16) Block Diagram Pin Configuration (16-Pin TSSOP) VDD 16 S0 1 VDDX CLK0 15 Control S1 2 CLK0 CLK0 Logic S1:S0 Phase 14 NC 3 CLK0 2 Lock Loop 13 X1/CLK 4 GNDA CLK1 X1/CLK 12 X2 5 VDDA CLK1 Crystal 25 MHz 11 Driver OE 6 CLK1 crystal or clock X2 10 GND 7 CLK1 Pulling R R 9 NC 8 IREF Capacitors GND OE PI6LC48H02 www.diodes.com Sept 2017 1 Document Number DS40207 Rev 2-2 Diodes Incorporated A product Line of Diodes Incorporated PI6LC48H02 Pin Description Pin Pin Name I/O Type Description 1 S0 Input Select pin 0 (Internal pull-up resistor). See Table 1. 2 S1 Input Select pin 1 (Internal pull-up resistor). See Table 1. 3 NC - Do not connect 4 X1/CLK Input Crystal or clock input. Connect to a 25MHz crystal or single ended clock. 5 X2 Output Crystal connection. Leave unconnected for clock input. 6 OE Input Output enable. Internal pull-up resistor. 7 GND Power Ground 8 NC - Do not connect 9 IREF Output Precision resistor attached to this pin is connected to the internal current reference. 10 CLK1 Output HCSL compliment clock output 11 CLK1 Output HCSL clock output 12 VDDA Power Connect to a +3.3V source. 13 GNDA Power Output and analog circuit ground. 14 CLK0 Output HCSL compliment clock output 15 CLK0 Output HCSL clock output 16 VDDX Power Connect to a +3.3V source. Table 1: Output Select Table S1 S0 CLK(MHz) 0 0 25 0 1 100 1 0 125 1 1 200 PI6LC48H02 www.diodes.com Sept 2017 2 Document Number DS40207 Rev 2-2 Diodes Incorporated