STK20C04 512 x 8 nvSRAM QuantumTrap CMOS Nonvolatile Static RAM Obsolete - Not Recommend for new Designs FEATURES DESCRIPTION 25ns, 35ns and 45ns Access Times The Simtek STK20C04 is a fast static RAM with a non- volatile element incorporated in each static memory STORE to Nonvolatile Elements Initiated by Hardware cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data RECALL to SRAM Initiated by Hardware or Power Restore resides in nonvolatile elements. Data may easily be transferred from the SRAM to the Nonvolatile Elements Automatic STORE Timing (the STORE operation), or from the Nonvolatile Ele- 10mA Typical I at 200ns Cycle Time CC ments to the SRAM (the RECALL operation), using the Unlimited READ, WRITE and RECALL Cycles NE pin. Transfers from the Nonvolatile Elements to the 1,000,000 STORE Cycles to Nonvolatile Ele- SRAM (the RECALL operation) also take place auto- ments matically on restoration of power. The STK20C04 100-Year Data Retention over Full Industrial combines the high performance and ease of use of a Temperature Range fast SRAM with nonvolatile data integrity. Commercial and Industrial Temperatures The STK20C04 features industry-standard pinout for nonvolatile RAMs in a 28-pin 600 mil plastic DIP. PIN CONFIGURATIONS BLOCK DIAGRAM 1 NE 28 V CC 2 Quantum Trap NC 27 W 3 26 A NC 7 16 x 256 A 4 25 A 6 8 A 5 24 NC 5 6 A 23 NC 4 STORE 7 A 22 G 3 A 5 8 A 21 NC 2 A 9 20 E A STATIC RAM 1 6 RECALL A 10 19 DQ 0 7 ARRAY A 11 DQ 18 DQ 7 0 6 16 x 256 12 DQ 17 DQ 1 5 A 8 13 16 DQ DQ 2 4 V 14 15 DQ SS 3 28 - 600 PDIP PIN NAMES DQ 0 COLUMN I/O STORE/ DQ A - A Address Inputs 1 0 8 RECALL COLUMN DEC DQ 2 W Write Enable CONTROL DQ 3 DQ - DQ Data In/Out 0 7 DQ 4 E Chip Enable DQ 5 A A A A A 2 3 4 0 1 DQ G 6 G Output Enable DQ NE 7 NE Nonvolatile Enable E V Power (+ 5V) CC W V Ground SS March 2006 1 Document Control ML0001 rev 0.2 INPUT BUFFERS ROW DECODERSTK20C04 a ABSOLUTE MAXIMUM RATINGS Note a: Stresses greater than those listed under Absolute Maximum Voltage on Input Relative to Ground 0.5V to 7.0V Ratings may cause permanent damage to the device. This is a Voltage on Input Relative to V 0.6V to (V + 0.5V) SS CC stress rating only, and functional operation of the device at condi- Voltage on DQ 0.5V to (V + 0.5V) 0-7 CC tions above those indicated in the operational sections of this Temperature under Bias . 55C to 125C specification is not implied. Exposure to absolute maximum rat- Storage Temperature . 65C to 150C ing conditions for extended periods may affect reliability. Power Dissipation 1W DC Output Current (1 output at a time, 1s duration) 15mA DC CHARACTERISTICS (V = 5.0V 10%) CC COMMERCIAL INDUSTRIAL SYMBOL PARAMETER UNITS NOTES MIN MAX MIN MAX b I Average V Current 85 90 mA t = 25ns CC CC AVAV 1 75 75 mA t = 35ns AVAV 65 65 mA t = 45ns AVAV c I Average V Current during STORE 3 3 mA All Inputs Dont Care, V = max CC CC CC 2 b I Average V Current at t = 200ns W (V 0.2V) CC CC AVAV CC 3 10 10 mA 5V, 25C, Typical All Others Cycling, CMOS Levels d I Average V Current 25 26 mA t = 25ns, E V SB CC AVAV IH 1 (Standby, Cycling TTL Input Levels) 21 22 mA t = 35ns, E V AVAV IH 18 19 mA t = 45ns, E V AVAV IH d I V Standby Current E (V 0.2V) SB CC CC 2 750 750 A (Standby, Stable CMOS Input Levels) All Others V 0.2V or (V 0.2V) IN CC I Input Leakage Current V = max ILK CC 1 1 A V = V to V IN SS CC I Off-State Output Leakage Current V = max OLK CC 5 5 A V = V to V , E or G V IN SS CC IH V Input Logic 1 Voltage 2.2 V + .5 2.2 V + .5 V All Inputs IH CC CC V Input Logic 0 Voltage V .5 0.8 V .5 0.8 V All Inputs IL SS SS V Output Logic 1 Voltage 2.4 2.4 V I = 4mA OH OUT V Output Logic 0 Voltage 0.4 0.4 V I = 8mA OL OUT T Operating Temperature 0 70 40 85 C A Note b: I and I are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded. CC CC 1 3 Note c: I is the average current required for the duration of the STORE cycle (t ) . CC STORE 2 Note d: E V will not produce standby current levels until any nonvolatile cycle in progress has timed out. IH AC TEST CONDITIONS Input Pulse Levels . 0V to 3V Input Rise and Fall Times . 5ns Input and Output Timing Reference Levels . 1.5V 5.0V Output Load . See Figure 1 e 480 Ohms CAPACITANCE (T = 25C, f = 1.0MHz) A SYMBOL PARAMETER MAX UNITS CONDITIONS OUTPUT 30 pF C Input Capacitance 8 pF V = 0 to 3V IN INCLUDING 255 Ohms SCOPE AND C Output Capacitance 7 pF V = 0 to 3V OUT FIXTURE Note e: These parameters are guaranteed but not tested. Figure 1: AC Output Loading March 2006 2 Document Control ML0001 rev 0.2