IS62C5128BL, IS65C5128BL 512Kx8HIGH-SPEEDCMOSSTATICRAM JULY2011 FEATURES DESCRIPTION The ISSI IS62C5128BL and IS65C5128BL are high-speed, High-speed access time: 45ns 4,194,304-bit static RAMs organized as 524,288 words by Low Active Power 50: mW (typical) 8 bits. They are fabricated using ISSI s high-performance Low Standby Power 10: mW (typical) CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as CMOS standby fast as 45ns with low power consumption. TTL compatible interface levels Single 5V 10% power supply When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced Fully static operation: no clock or refresh down with CMOS input levels. required Available in 32-pin sTSOP-I, 32-pin SOP and Easy memory expansion is provided by using Chip Enable 32-pin TSOP-II packages and Output Enable inputs, CE and OE. The active LOW Commercial, Industrial and Automotive tem- Write Enable (WE) controls both writing and reading of the perature ranges available memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. Lead-free available The IS62C5128BL and IS65C5128BL are packaged in the JEDEC standard 32-pin sTSOP-I, 32-pin SOP and 32-pin TSOP-II packages FUNCTIONAL BLOCK DIAGRAM 512K X 8 A0-A18 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O I/O0-I/O7 DATA CIRCUIT CE CONTROL OE CIRCUIT WE Copyright 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason- ably be expected to cause failure of the life support system or to significantly af fect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. B 06/28/2011IS62C5128BL, IS65C5128BL PIN CONFIGURATION 32-pinsTSOP(TYPEI) 32-pinSOP 32-pin TSOP(TYPE II) A17 1 32 32 VDD A11 1 OE A16 2 31 A15 A9 2 31 A10 A14 3 30 A18 A8 3 30 CE A12 4 29 WE A13 4 29 I/O7 A7 5 28 A13 WE 5 28 I/O6 A6 6 27 A8 A18 6 27 I/O5 A5 7 26 A9 A15 7 26 I/O4 A4 8 25 A11 VDD 8 25 I/O3 A3 9 24 OE A17 9 24 GND A2 10 23 A10 A16 10 23 I/O2 A1 11 22 CE A14 11 22 I/O1 A0 12 21 I/O7 A12 12 21 I/O0 I/O0 13 20 I/O6 A7 13 20 A0 I/O1 14 19 I/O5 A6 14 19 A1 I/O2 15 18 I/O4 A5 15 18 A2 17 GND 16 I/O3 16 17 A3 A4 PINDESCRIPTIONS A0-A18 Address Inputs CE Chip Enable 1 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output Vdd Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com Rev. B 06/28/2011