PCA9559PW,118

PCA9559 2 5-bit multiplexed/1-bit latched 6-bit I C-bus EEPROM DIP switch Rev. 5.0 25 October 2021 Product data sheet 1 General description PCA9559 is a 20-pin CMOS device consisting of one 6-bit non-volatile EEPROM registers, 5 hardware pin inputs and a 5-bit multiplexed output with one latched EEPROM bit. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configuration, where 2 preset values (1 sets of internal non-volatile registers and 1 set of external hardware pins) set processor voltage for operation in either performance or deep sleep modes. The PCA9559 is also useful in server and telecom/networking applications when used to replace DIP switches or jumpers, since 2 the settings can be easily changed via I C/SMBus without having to power down the equipment to open the cabinet. The non-volatile memory retains the most current setting selected before the power is turned off. The PCA9559 typically resides between the CPU and Voltage Regulator Module (VRM) when used for CPU VID (Voltage IDentification code) configuration. It is used to bypass the CPU-defined VID values and provide a different set of VID values to the VRM, if an increase in the CPU voltage is desired. An increase in CPU voltage combined with an increase in CPU frequency leads to a performance boost of up to 7.5%. Lower CPU voltage reduces power consumption. 2 The PCA9559 has 2 address pins allowing up to 4 devices to be placed on the same I C- bus or SMBus. 2 Features and benefits 5-bit 2-to-1 multiplexer, 1-bit latch DIP switch 6-bit internal non-volatile register 2 Internal non-volatile register programmable and readable via I C-bus Override input forces all outputs to logic 0 5 open drain multiplexed outputs 1 open drain non-multiplexed (latched) output 5 V and 2.5 V tolerant inputs/outputs Useful for jumperless configuration of PC motherboards 2 2 address pins, allowing up to 4 devices on the I C-bus ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA.NXP Semiconductors PCA9559 2 5-bit multiplexed/1-bit latched 6-bit I C-bus EEPROM DIP switch 3 Ordering information Table 1.Ordering information Type number Topside Package marking Name Description Version PCA9559PW PCA9559 TSSOP20 plastic thin shrink small outline package 20 leads body SOT360-1 width 4.4 mm 3.1 Ordering options Table 2.Ordering options 1 Type number Orderable part Package Packing method Minimum order Temperature number quantity PCA9559PW PCA9559PW,118 TSSOP20 REEL 13 Q1 NDP 2500 T = -40 C to +85 C amb 1 Standard packing quantities and other packaging data are available at www.nxp.com/packages/. PCA9559 All information provided in this document is subject to legal disclaimers. NXP B.V. 2021. All rights reserved. Product data sheet Rev. 5.0 25 October 2021 2 / 20