DATASHEET HIP4020 FN3976 Rev.5.00 Half Amp Full Bridge Power Driver for Small 3V, 5V, and 12V DC Motors Feb 8, 2019 In the Functional Block Diagram of the HIP4020, the four Features switches and a load are arranged in an H-configuration so Two independent controlled complementary MOS power that the drive voltage from terminals OUTA and OUTB can output half H-drivers (full-bridge) for nominal 3V to 12V be cross-switched to change the direction of current flow in power supply operation the load. This is commonly known as 4-quadrant load Split voltage power supply option for output drivers control. As shown Figure 1, switches Q and Q are 1 4 conducting or in an ON state when current flows from V Load switching capabilities to 0.5A DD through Q to the load, and then through Q to terminal 1 4 Single supply range +2.5V to +15V V where load terminal OUTA is at a positive potential SSB Low standby current with respect to OUTB. Switches Q and Q are operated 1 4 CMOS/TTL compatible input logic synchronously by the control logic. The control logic switches Q and Q to an open or OFF state when Q and 3 2 1 Over-temperature shutdown protection Q are switched ON. To reverse the current flow in the load, 4 Overcurrent limit protection the switch states are reversed where Q and Q are OFF 1 4 Overcurrent fault flag output while Q and Q are ON. Consequently, current then flows 2 3 from V through Q , through the load, and through Q to Direction, braking and PWM control DD 3 2 terminal V , and load terminal OUTB is then at a positive SSA Pb-free plus anneal (RoHS compliant) potential with respect to OUTA. Applications Terminals ENA and ENB are ENABLE inputs for the Logic A and B Input Controls. The ILF output is an Overcurrent Limit DC motor driver Fault Flag Output and indicates a fault condition for either Relay and solenoid drivers Output A or B or both. The V and V are the Power DD SS Stepper motor controller Supply reference terminals for the A and B Control Logic Inputs and ILF Output. While the V positive power supply Air core gauge instrument driver DD terminal is internally connected to each bridge driver, the Speedometer displays V and V power supply terminals are separate and SSA SSB Tachometer displays independent from V and may be more negative than the SS V ground reference terminal. The use of level shifters in Remote power switch SS the gate drive circuitry to the NMOS (low-side) output stages Battery operated switch circuits allows controlled level shifting of the output drive relative to Logic and microcontroller operated switch ground. Related Literature For a full list of related documents, visit our website: HIP4020 device page V DD I SENSE I SENSE Q B1 3 Q 1 B2 OUTB ENB OUTA A1 T SENSE A2 Q 2 Q 4 ENA I SENSE ILF I SENSE V V V SS SSA SSB FIGURE 1. BLOCK DIAGRAM FN3976 Rev.5.00 Page 1 of 10 Feb 8, 2019 CONTROL CONTROL LOGIC A LOGIC B OVER TEMP. AND CURRENT LIMIT, LEVEL SHIFT, DRIVE CONTROL LOADHIP4020 Ordering Information PART NUMBER PART TEMP. TAPE AND REEL PACKAGE PKG. (Notes 2, 3) MARKING RANGE (C) (UNITS) (Note 1) (RoHS Compliant) DWG. HIP4020IBZ HIP4020IBZ -40 to 85 - 20 Ld SOIC M20.3 HIP4020IBZT HIP4020IBZ -40 to 85 1k 20 Ld SOIC M20.3 NOTES: 1. See TB347 for details about reel specifications. 2. Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), see the HIP4020 device page. For more information about MSL, see TB363. Pinout SOIC TOP VIEW NC 1 20 NC ILF 2 19 V DD B2 3 18 NC ENB OUTB 4 17 B1 5 16 V SSB V 6 15 V SS SSA ENA 14 OUTA 7 A1 8 13 NC 9 12 A2 V DD NC 10 11 NC Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 12, 19 V Positive power supply pins internally common and externally connect to the same positive supply (V+). DD 15 V Negative power supply pin negative or ground return for Switch Driver A externally connect to the supply (V-). SSA 16 V Negative power supply pin negative or Ground return for Switch Driver B externally connect to the supply (V-). SSB 6V Common ground pin for the Input Logic Control circuits. It can be used as a common ground with V and SS SSA V SSB. 8, 5 A1, B1 Input pins used to control the direction of output load current to/from OUTA and OUTB, respectively. When connected, A1 and B1 can be controlled from the same logic signal to change the directional rotation of a motor. 9, 3 A2, B2 Input pins used to force a low state on OUTA and OUTB, respectively. When connected, A2 and B2 can be controlled from the same logic signal to activate dynamic braking of a motor. 7, 4 ENA, ENB Input pins used to enable Switch Driver A and Switch Driver B, respectively. When low, the respective output is in a high impedance (Z) off-state. Since each switch driver is independently controlled, OUTA and OUTB can be separately PWM controlled as half H-switch drivers. 14, 17 OUTA, OUTB Respectively, Switch Driver A and Switch Driver B output pins. 2 ILF Current limiting fault output flag pin when in a high logic state, signifies that Switch Driver A or B, or both are in a Current Limiting Fault mode. FN3976 Rev.5.00 Page 2 of 10 Feb 8, 2019